Job Location: India / US / Canada / Europe
Job Overview
As an Analog Layout Engineer at AISemiCon, you will play a critical role in the design and development of high-performance analog and mixed-signal integrated circuits (ICs). Your main responsibility will be to create layout designs for analog blocks and ensure their adherence to design rules, specifications, and performance targets. You will collaborate closely with cross-functional teams, including circuit designers, verification engineers, and process engineers, to achieve optimal layout implementation. We are seeking individuals with a strong passion for analog layout, deep expertise in IC design, and a keen eye for detail. The key responsibilities for this role include, but are not limited to:
Requirements:
- Excellent work experience in Analog Layout design in advanced node processes
- Hands on experience in any or multiple critical blocks such as BGR, LDO, Charge pump, SERDES, PHY, HDMI, PLL, ADC, DAC, LDO, Current Mirrors, Comparator, Differential Amplifier etc.
- Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process
- Excellent understanding of Analog Layout concepts (e.g. Matching, Electro- migration, Latch-up, Coupling, Cross-talk, IR-drop, Active and Passive parasitic devices etc.
- Excellent problem-solving skills in Routing Congestion, Physical Verification in Custom Layout.
- Work closely with the verification team to address layout-related issues and ensure design robustness.
- Follow design rules, guidelines, and best practices to ensure design manufacturability and yield.
- Collaborate with process engineers to understand process requirements and optimize layout designs accordingly.
- Conduct layout parasitic extraction and work with the simulation team to validate and optimize design performance.
- Participate in design reviews and contribute to overall design improvements.
- Stay updated with the latest advancements in analog layout techniques, process technologies, and industry standards.
Qualifications:
- Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering or a related field.
- 7-8 Years of proven experience in analog layout design, with expertise in IC design methodologies and tools.
- Sound knowledge and experience for verification checks like DRC / LVS / ERC / Antenna / LPE / DFM etc.
- Knowledge of various analog layout techniques, understanding of various circuit principles as affected by Layouts such as speed, capacitance, power, noise, and area
- Proficiency in industry-standard layout tools, such as Cadence Virtuoso or Synopsys IC Compiler and verification tools in a Linux environment of Cadence EDA tools.
- Solid understanding of layout design principles, design rules, and process technologies.
- Familiarity with analog block-level and top-level layout techniques for performance optimization.
- Knowledge of layout parasitic extraction and simulation methodologies.
- Excellent attention to detail and problem-solving skills.
- Effective communication and collaboration skills to work in a cross-functional team environment.
Company Overview:
Applied Intelligence Semiconductors Private Limited (AISemiCon), an “Innovative Product Enterprise” is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry.
If you are passionate about analog layout design and want to be part of a dynamic and forward-thinking team, we encourage you to apply for the position of Analog Layout Engineer at AISemiCon. To apply, please submit your resume and a cover letter highlighting your relevant experience and achievements to hiring@aisemicon.in
We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing.
Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs.